Specialization profile--Digital Systems

This profile covers theory and design methodologies of digital circuits and systems, with application areas in wireless communication, biomedical imaging based on single-photon technology, quantum computing, 3D IC design. Current areas of interest are (1) spiking neural networks and neuromorphic hardware, (2) high-level electronic (VLSI) system level design (power optimization and reduction techniques, SoC design methodology, communication architectures and protocols), and (3) physical modeling and verification of large VLSI circuits (parasitics and temperature modeling). 

Responsible professors

  • Dr. Charlotte Frenkel
  • Dr. Chan Gao

Compulsory courses
EE4610 Digital IC Design I 
EE4615 Digital IC Design II

Suggested courses

CESE4010Advanced computing systems5 EC details
CESE4035Computer arithmetic5 EC details
CESE4040Processor design project5 EC details
EE4575Electronics for quantum computation5 EC details
EE4610Digital IC design3 EC details
EE4615Digital IC design II3 EC details
ET4351Digital VLSI Systems on Chip4 EC details
ET4362High speed digital design for embedded systems5 EC details
ET4371Mixed-mode wireless transceivers4 EC details

MSc project proposals

Some examples of thesis topics (this list is not exhaustive):
BE[2022] External electronics for ultrasonically powered stimulators
ELCA[2024] An FPGA Accelerator of OpenAI Whisper Speech Recognizer
[2024] A Real-Time Neural Audio Denoising Chip
[2022] Charge-Sampling Fractional-N PLL (SiTime)
[2022] Low-Phase-Noise VCO for Sub-10fs-Jitter PLL (SiTime)
[2024] AI4RF: Artificial Intelligence for 6G RF Signal Processing
[2024] Digital VLSI Accelerator for Ultra-Low-Latency Event-Driven Eye-Tracking
[2024] OpenWiFi-DPD: An Open-Source Digital Pre-distortion In-the-loop Wi-Fi Demonstrator
SPSDigital processing for large pixel array 3D-TOF systems

Thesis examples

BE 2021 Emmanouil (Manos) KandilakisUltra-Low Energy Time-Mode ADC with Background Calibration for Biomedical Sensing Applications
ELCA 2018 Bas StijnenA military satellite terminal for S&F
SPS 2024 Bart HettemaCircuits and Systems for a Spiking Neuromorphic Network in 28 nm CMOS
2023 Tianyu DuDigital self-timed neuron design for Spiking Neuron Networks
2022 Jinyao ZhangSelf-timed interconnect for SNN - From Point to Point Communication to Multi-array Segmented-bus Solution
Longxing JiangA New Logarithmic Quantization Technique and Corresponding Processing Element Design for CNN Accelerators
Yichen YangOff-chip Self-timed SNN Custom Digital Interconnect System
Yongkang ZhouModeling of router structure for SNN-applicable NoC definitions
2021 Hanyu MaHardware Spiking Neural Network based Sbox AES
2019 Joris CoenenA Highly Concurrent, Memory-Efficient AER Architecture for Neuro-Synaptic Spike Routing
2017 Andrei ArdeleanEnergy-efficient multipath ring network for heterogeneous clustered neuronal arrays
He ZhangMulti-FPGA Interconnection Simulation
Ester StienstraA 32 x 32 Spiking Neural Network System On Chip
2016 Bahador ValizadehpashaOn-Chip Cryogenic Read-Out of Spin Qubit for Quantum Computers
Rosario IncandelaCryogenic CMOS LNA for RF readout of spin qubits
Preethi PadmanabhanDesign of a Sub-harmonically Injection-Locked TDC Array for Space Applications
Arin ÜlküHigh Resolution, Fully Digital Photon-Counting Image Sensors in DSM CMOS Technologies
Kiki WiriantoMulti-Domain SystemC Model of a Neural Interface
2015 Guozhi XuImplementation of in-situ monitoring techniques for power reduction in smart sensors
Yuteng HaoLow power digital baseband architecture for wireless sensor nodes
Ting GongDevelopment and Characterization of an Endoscopic TOF PET System
Martijn BijwaardScalable Network Based Clock Synchronization for Digital PET System
2014 Dali ZhangLong-range 3D Range Detector Based on Time-correlated Single-photon Counting
Harald HomulleDevelopment of a Multichannel TCSPC System in a Spartan 6 FPGA
Jorn ZimmerlingModeling of wave propagation in open domains: A Krylov subspace approach
Milovan VasicPhysical design of a 3D router: reducing the number of vertical connections and enabling asynchronous operation
2012 Nupur LodhaMonolithic Integration of LEDs and SPADs in Standard CMOS Technology for Optical Joystick Application
J. Rodriguez Rodriguez de GuzmanA general RDE-based simulator for statistical timing analysis
2011 Vashishth ChaudhriFundamentals, Specifications, Architecture and Hardware Towards a Navigation System Based on Radio Pulsars
Priyanka KumarTime-of-Flight 3D Imaging based on a SPAD-TDC Pixel Array in Standard 65 nm CMOS Technology
Guanyu YiHigh-Quality, Real-Time HD Video Stereo Matching on FPGA
Harmen MenningaImplementation, Characterization, and Optimization of an FPGA-based Time-to-Digital Converter
2010 Ashish NigamStandard Cell Behavior Analysis and Waveform Set Model for Statistical Static Timing Analysis
2009 Rahmadi TrimanandaA hierarchically pipelined data acquisition system for single-photon avalanche diode array

Contact person

For more information about the research group, possible thesis topics, and suggestions for your ISP:

dr. Charlotte Frenkel

Electronic Instrumentation Group

Department of Microelectronics